Workpieces of semiconductor material are conventionally cut into wafers by means of a wire saw. Wire saws are used in the prior art to cut cylindrical mono- or polycrystalline workpieces of semiconductor material, for example silicon, simultaneously into a multiplicity of wafers in one working operation. The throughput of the wire saw is in this case of great importance for the economic viability of the method.
Owing to the way in which they are produced, shorter and longer rod pieces are obtained in wafer production. It is also often necessary to cut rod portions from a single crystal, for example in order to examine the crystal properties. In order then to increase the throughput when sawing these different rod lengths, a plurality of workpieces are to be clamped simultaneously in the wire saw and cut in one working operation.
U.S. Pat. No. 6,119,673 describes the simultaneous cutting of a plurality of cylindrical workpieces, which are arranged coaxially behind one another. To this end a conventional wire saw is used, with a plurality of workpieces adhesively bonded respectively on a sawing strip being fixed with a certain spacing in a coaxial arrangement on a common mounting plate, by which they are clamped in the wire saw and cut simultaneously. This gives rise to a number of packets of wafers, corresponding to the number of workpieces, which are still fixed on the mounting plate. After the cutting, separating plates are placed loosely into the spacings between the packets of wafers in order to avoid confusion of the wafers of the various packets.
U.S. Pat. No. 6,802,928 B2 describes a method in which dummy pieces of the same cross section are adhesively bonded onto the end surfaces of the workpiece to be cut, which are cut with the workpiece and are then discarded. This is intended to prevent the wafers obtained at the two ends of the workpiece from fanning out during the end phase of the cutting, and therefore to improve the wafer geometry. This method has the crucial disadvantage that part of the gang length, which is limited by the dimensions of the wire saw, is used for cutting the “unused” dummy pieces. Furthermore the provision, handling and adhesive bonding of dummy pieces is very elaborate and difficult to manage.
In the simultaneous cutting of a plurality of workpieces in a wire saw as described in U.S. Pat. No. 6,119,673, the gang length of the wire saw also cannot be used optimally since the workpieces to be cut have very different lengths owing to the way in which they are produced. This problem arises in particular whenever the workpieces consist of monocrystalline semiconductor material, since the known crystal pulling processes only allow certain usable lengths of the crystals or, in order to monitor the crystal pulling processes—as already mentioned above—it is necessary to split the crystals and produce test samples at various positions of the crystal.
DE 102 006 050 330 discloses a method for simultaneously cutting at least two cylindrical workpieces into a multiplicity of wafers by means of a wire saw, in which 2 or more workpieces are selected from a stock of workpieces, they are fastened behind one another on a mounting plate, a certain minimum distance being maintained respectively between the workpieces, clamped in the wire saw and cut perpendicularly to their longitudinal axis (geometrical axis) by means of the wire saw. This method allows better use of the wire gang length. In order to avoid confusion, similarly as in the method described in U.S. Pat. No. 6,119,673, separating pieces are inserted laterally between the wafer packets and then fixed on the wafer carrier. The separating pieces also protect the wafer packets against tilting away laterally.
A feature common to all the known methods is that a distance between the rod pieces is to be maintained for cutting the rod pieces.
It has been found that in the methods described above, geometrical variations of the wafers sawed from a rod of particular length assembled in this way occur compared with the wafers cut from a single semiconductor rod of corresponding length. This is to be observed even when the composite rod and the single rod are equally long and the wire gang used is therefore the same.
Besides the thickness variation (TTV, GBIR), the planarity of the two surfaces of the semiconductor wafer is of great importance. After cutting a semiconductor single crystal by means of a wire saw, for example a silicon single crystal, the wafers thereby produced have an undulating surface. In the subsequent steps, for example grinding or lapping, this waviness can be removed partially or fully depending on the wavelength and amplitude of the waviness and the depth of the material removal. In the worst case, such surface irregularities (“undulations”, “waviness”), which may have periodicities of from a few mm up to for example 50 mm, are still detected even after polishing on the finished semiconductor wafer where they have a negative effect on the local geometry.
The disadvantages of the methods known from the prior art are found to be particularly significant for the bow and warp parameters as a measure of the deviation of the actual wafer shape from the desired ideal wafer shape (or “sori”). This pertains in particular to the warp of the wafers. The warp is defined in SEMI Standard M1-1105, and indicates the difference of the minimum and maximum deviations of the mid-plane of a wafer relative to a reference plane on the backside of the wafer. Expressed simply, the warp represents a measure of the deformation of the wafer.